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AT86RF231
9.2
9.2.1
Transmitter (TX)
Overview
The AT86RF231 transmitter consists of a digital base band processor (TX BBP) and an analog
radio front end, see Figure 9-2 on page 104 .
Figure 9-2.
Transmitter Block Diagram
DIG3/4
Ext. RF front-end and
Output Power Control
Control, Registers
μC
I/F
RFP
PA
Buf
PLL – TX Modulation
TX Data
TX BBP
SPI
SPI
I/F
RFN
Frame
Buffer
Analog Domain
Digital Domain
The TX BBP reads the frame data from the Frame Buffer and performs the bit-to-symbol and
symbol-to-chip mapping as specified by IEEE 802.15.4 in section 6.5.2. The O-QPSK modula-
tion signal is generated and fed into the analog radio front end.
The fractional-N frequency synthesizer (PLL) converts the baseband transmit signal to the RF
signal, which is amplified by the power amplifier (PA). The PA output is internally connected to
bidirectional differential antenna pins (RFP, RFN), so that no external antenna switch is needed.
9.2.2
9.2.3
9.2.4
Frame Transmit Procedure
The frame transmit procedure including writing PSDU data in the Frame Buffer and initiating a
transmission is described in Section 10.2 “Frame Transmit Procedure” on page 127 , Frame
Transmit Procedure.
Configuration
The maximum output power of the transmitter is typically +3 dBm. The output power can be con-
figured via register bits TX_PWR (register 0x05, PHY_TX_PWR). The output power of the
transmitter can be controlled over a range of 20 dB.
A transmission can be started from PLL_ON or TX_ARET_ON state by a rising edge of pin
SLP_TR or by writing TX_START command to register bits TRX_CMD (register 0x02,
TRX_STATE).
TX Power Ramping
To optimize the output power spectral density (PSD), the PA buffer and PA are enabled sequen-
tially. This is illustrated by a timing example using default settings, shown in Figure 9-3 on page
105 . In this example the transmission is initiated with the rising edge of pin 11 (SLP_TR). The
radio transceiver state changes from PLL_ON to BUSY_TX. The modulation starts 16 μs after
SLP_TR.
104
8111C–MCU Wireless–09/09
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